1. Field of the Invention
The present invention relates to a liquid crystal display device, a driving method and an integrated circuit to be used in the same, and more particularly to the liquid crystal display device, the driving method and the integrated circuit to be suitably used when a high-quality display screen is realized with low power consumption.
2. Description of the Related Art
In recent years, as one of measures against global warming, lowed power consumption in electrical goods is required. Therefore, in a field of image display devices in particular, a liquid crystal display device has become widely used owing to its greater possibility of low power consumption and space saving compared with a conventional CRT (Cathode Ray Tube).
As a related technology of this kind, a liquid crystal display device is disclosed in, for example, Japanese Laid-open Patent Application No. Sho63-296092 (Pages. 1-2, FIGS. 1 and 2) (hereinafter, referred to as Patent Reference 1) and Japanese Laid-open Patent Application No. Hei06-149174 (Abstract, FIGS. 1 and 2) (hereinafter, referred to as Patent Reference 2).
The disclosed liquid crystal display device, as shown in FIG. 5, includes a liquid crystal panel 1, a data driving section 2, a gate driving section 3, a VCOM generating section 4, and a driving timing generating section 5. The disclosed liquid crystal panel 1 is made up of data electrodes Xi (i=1, 2, . . . , m; for example, m=1920), gate electrodes Yj (j=1, 2, . . . , n; for example, n=1080), pixels SPi,j, common electrodes COM1 and COM2. The common electrode COM 1 is a facing electrode of each of the pixels SPi,j mounted in a manner to correspond to odd-numbered columns of the data electrodes Xi. The common electrode COM2 is a facing electrode of each of the pixels SPi,j in a manner to correspond to each even-numbered column of the data electrodes Xi. Each of the pixel SPi,j is mounted at an intersection of each of the data electrodes Xi and each of the gate electrodes Yj and is made up of a TFT (Thin Film Transistor) Q and a capacitor C. The capacitor C schematically shows a holding capacitor to hold a voltage corresponding to applied pixel data Di (D1, D2, . . . , Dm) and a liquid crystal layer displaying a pixel with a gray level corresponding to the pixel data Di.
The driving timing generating section 5 sends out, at timing based on a video signal vi and according to a specified AC (Alternating Current) driving method (for example, to a data line inversion driving) a control signal ct1 to the data driving section 2, a control signal ct2 to the gate driving section 3, and a control signal ct3 to the VCOM generating section 4. The data driving section 2 applies, in accordance with the control signal ct1, a voltage corresponding to pixel data Di through each data electrode Xi to each of the pixels SPi,j of the liquid crystal panel 1. The gate driving section 3 applies a scanning signal Gj (G1, G2, . . . , Gn) in a preset order in accordance with a control signal ct2. The VCOM generating section 4, in accordance with a control signal ct3, applies common voltages vCOM 1 and vCOM 2 being opposite to each other in polarity for every frame period. In the liquid crystal display device, as shown in FIG. 6, data line inversion driving is performed by the application of the common voltages vCOM1 and vCOM2 being opposite to each other in polarity for every frame period to the common electrodes COM1 and COM2.
The liquid crystal display device disclosed in Japanese Laid-open Patent Application No. Hei05-188881 (Abstract, FIGS. 1 and 4) (hereinafter, referred to as Patent Reference 3), as shown in FIG. 7, includes a display section 10, a power circuit 21, a control section 22, a common electrode driver 23, and a switching section 24. The display section 10 has a liquid crystal panel 11, a data driving section 12, and a gate driving section 13. The liquid crystal panel 11 has a plurality of common electrodes. The common electrode driver 23, in accordance with an alternating current control signal b, drives the common electrodes of the liquid crystal panel 11 through a driving line. The power circuit 21 supplies power current to the common electrode driver 23. The switching section 24 has switches S1, Sn and, in accordance with a switch control signal d, connects and disconnects a driving line used to connect the common electrode driver 23 with the common electrode of the liquid crystal panel 11 with and from the power circuit 21 and turns on/off a common electrode signal c (c1) and sends out, as a feedback signal e (e1) to the power circuit 21. The control section 22, based on an alternated control signal a, outputs the alternating current control signal b and the switch control signal d and performs gate line inversion driving on the display section 10.
In the disclosed liquid crystal display device, when the above driving line is periodically switched by the common electrode driver 23 between two different potentials, the common electrode is driven and the driving line is connected by the control section 22 through the switching section 24 to the power circuit 21 for a specified period of time following the timing at which each driving line is switched from a high potential state to a low potential state and, as shown in FIG. 8, a common electrode signal c (ci) being part of the driving current is fed back as a feed-back signal e (ei) to the power circuit 21.
Additionally, the liquid crystal display device disclosed in Japanese Laid-open Patent Application No. Hei11-030975 (Abstract, FIG. 1) (hereinafter, referred to as Patent Reference 4) includes a liquid crystal panel 31, a data driving section 32, and a gate driving section 33.
The disclosed liquid crystal display device 31, as in the case of the liquid crystal display device 1 in FIG. 5, has data electrodes Xi, gate electrodes Yj, pixels SPi,j, however, has a common electrode COM only as the facing electrode. The data driving section 32 applies a voltage corresponding to pixel data Di through each data electrode Xi to every pixel SPi, j on the liquid crystal panel 31. Moreover, the data driving section 32 has switches SWC1, SWC2, . . . , SWCm to disconnect outputs from the data electrode Xi, X2, . . . , Xm and switches SWD1, SWD2, . . . , SWDm-1 to cause a short between the data electrodes Xi adjacent to each other. The gate driving section 33 applies a scanning signal Gj to each scanning line Y1 in preset orders.
In the disclosed liquid crystal display device, the switches SWC1, SWC2, . . . , SWCm are put into an ON state at a specified timing and the switches SWD1, SWD2, . . . , SWDm-1 are put into an OFF state at a specified timing and, therefore, as shown in FIG. 10, during a charge equilibration period f, the data electrode X1, . . . , Xm are charged and discharged to a specified level whereby the electric charge equilibration occurs and, as a result, power consumption to drive the liquid crystal panel 31 is reduced.
However, the disclosed liquid crystal display device has the following problems. That is, in the liquid crystal display device disclosed in the related art Patent Reference 1 and 2, the data line inversion driving is performed and, therefore, the power consumption is lower compared with the case of the dot inversion driving, however, flicker readily occurs, thus causing the deterioration of display quality.
The liquid crystal display device disclosed in the related art Patent Reference 3 has also a problem in that, though outputs of the common electrode driver 23 is kept to be connected to the driving line, since output impedance of the common electrode driver 23 is low and impedance of the power circuit 21 is high and, as a result, even by returning a feed back signal e (ei) back to the power circuit 21, no charge collection occurs at all. Moreover, since the gate line inversion driving is performed on the display section 10, display quality is lowered due to the occurrence of flicker.
In the liquid crystal display device disclosed in the related art Patent References 1, 2, and 3, by the sacrifice of display quality, low power consumption is to be achieved, the trade-off between high display quality and low power consumption, that is, the trade-off between the dot inversion driving to provide high display quality and the line inversion driving to provide low display quality, has not yet been overcome. To try to overcome the trade-off, by decreasing the number of times of discharge of capacitive load of the liquid crystal panel, the low power consumption is to be achieved, however, the problem still remains unsolved that display quality is lowered due to the occurrence of flicker and high display quality is incompatible with the low power consumption.
In addition, in the liquid crystal display device disclosed in the related art Patent Reference 4, since the supply voltage itself for driving of the liquid crystal panel 31 has not decreased, in the circuit of the data driving section 32, power to be consumed at the place where the supply power is being applied remains high. Therefore, the problem still remains unsolved in terms of low power consumption.